viz-coa

Computer Organization & Architecture Visual Curriculum

CPU
5-Stage Pipeline

IF, ID, EX, MEM, WB and Data Hazards.

LAUNCH
HIERARCHY
Cache & Bus

L1/L2/L3 access costs and AMAT metrics.

LAUNCH
MMU
Address Translation

How Virtual Addresses map to Physical RAM.

LAUNCH
MEMORY
Page Faults

LRU eviction and Disk Swapping mechanics.

LAUNCH